diff --git a/mcdp/resources/targets/general/device.dtd b/mcdp/resources/targets/general/device.dtd
new file mode 100644
index 0000000..092ca4d
--- /dev/null
+++ b/mcdp/resources/targets/general/device.dtd
@@ -0,0 +1,37 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/mcdp/resources/targets/general/memoryMap.dtd b/mcdp/resources/targets/general/memoryMap.dtd
new file mode 100644
index 0000000..3870c45
--- /dev/null
+++ b/mcdp/resources/targets/general/memoryMap.dtd
@@ -0,0 +1,17 @@
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/mcdp/resources/targets/general/registerDictionary.dtd b/mcdp/resources/targets/general/registerDictionary.dtd
new file mode 100644
index 0000000..14bdf08
--- /dev/null
+++ b/mcdp/resources/targets/general/registerDictionary.dtd
@@ -0,0 +1,18 @@
+
+
+
+
+
+
+
+
+
+
diff --git a/mcdp/resources/targets/mpc555/devices/deviceAm29LV160D.xml b/mcdp/resources/targets/mpc555/devices/deviceAm29LV160D.xml
new file mode 100644
index 0000000..b9575cc
--- /dev/null
+++ b/mcdp/resources/targets/mpc555/devices/deviceAm29LV160D.xml
@@ -0,0 +1,38 @@
+
+
+
+
+
+
+
+ 0x200000
+
+ ToppcKernel.CextRomBase
+ ToppcKernel.CextRomSize
+
+
+ ToppcKernel.excpCodeSize
+
+
+
+ 0x6000
+
+
+
+ 0x4000
+
+
+ 0x4000
+
+
+ 0x10000
+
+
+ 0x20000
+
+
+
+ ToppcKernel.pBR0
+ ToppcKernel.pOR0
+
+
\ No newline at end of file
diff --git a/mcdp/resources/targets/mpc555/devices/deviceMPC555Flash.xml b/mcdp/resources/targets/mpc555/devices/deviceMPC555Flash.xml
new file mode 100644
index 0000000..1d16329
--- /dev/null
+++ b/mcdp/resources/targets/mpc555/devices/deviceMPC555Flash.xml
@@ -0,0 +1,16 @@
+
+
+
+
+
+
+
+
+ 0x2000
+ 0x3E000
+
+
+ 0x40000
+ 0x30000
+
+
\ No newline at end of file
diff --git a/mcdp/resources/targets/mpc555/devices/deviceRAM.xml b/mcdp/resources/targets/mpc555/devices/deviceRAM.xml
new file mode 100644
index 0000000..2fadcf6
--- /dev/null
+++ b/mcdp/resources/targets/mpc555/devices/deviceRAM.xml
@@ -0,0 +1,64 @@
+
+
+
+
+
+
+
+
+
+ 0
+ 0x2000
+
+ 0
+
+
+
+ ToppcKernel.CintRamBase
+ ToppcKernel.CintRamSize
+
+
+ ToppcKernel.sysTabAdr
+
+
+
+
+
+
+
+
+
+
+
+
+ ToppcKernel.stackSize
+
+
+
+
+ ToppcKernel.CextRamBase
+ ToppcKernel.CextRamSize
+
+
+
+
+
+ ToppcKernel.pBR0
+ ToppcKernel.pOR0
+ ToppcKernel.pBR1
+ ToppcKernel.pOR1
+
+ ToppcKernel.pDMBR
+
+
+ ToppcKernel.pDMOR
+
+ 7
+
+ -1
+
+ 0x31C7400F
+
+ 0x03802
+
+
\ No newline at end of file
diff --git a/mcdp/resources/targets/mpc555/memoryAssignmentRAM.xml b/mcdp/resources/targets/mpc555/memoryAssignmentRAM.xml
index eaf1d6f..9ded604 100644
--- a/mcdp/resources/targets/mpc555/memoryAssignmentRAM.xml
+++ b/mcdp/resources/targets/mpc555/memoryAssignmentRAM.xml
@@ -1,6 +1,6 @@
-
+
diff --git a/mcdp/resources/targets/mpc555/memoryMap.dtd b/mcdp/resources/targets/mpc555/memoryMap.dtd
deleted file mode 100644
index 4d7c586..0000000
--- a/mcdp/resources/targets/mpc555/memoryMap.dtd
+++ /dev/null
@@ -1,24 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/mcdp/resources/targets/mpc555/memoryMap.xml b/mcdp/resources/targets/mpc555/memoryMap.xml
index c4dced0..48a112e 100644
--- a/mcdp/resources/targets/mpc555/memoryMap.xml
+++ b/mcdp/resources/targets/mpc555/memoryMap.xml
@@ -1,414 +1,10 @@
-
+
-
-
-
-
-
-
-
-
-
-
-
-
- 0
- 0x2000
-
- 0
-
-
-
-
-
-
-
-
-
-
-
-
-
- ToppcKernel.CintRamBase
- ToppcKernel.CintRamSize
-
-
-
-
-
-
- ToppcKernel.sysTabAdr
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- ToppcKernel.stackSize
-
-
-
-
-
-
-
-
-
-
-
-
-
- ToppcKernel.CextRamBase
- ToppcKernel.CextRamSize
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 0x2000
- 0x3E000
-
-
-
-
-
- 0x40000
- 0x30000
-
-
-
-
-
-
-
-
-
-
- ToppcKernel.CextRomBase
- ToppcKernel.CextRomSize
-
-
-
-
-
- ToppcKernel.excpCodeSize
-
-
-
-
-
-
- 0x6000
-
-
-
-
-
-
-
- 0x4000
-
-
-
-
-
-
-
- 0x4000
-
-
-
-
-
-
-
- 0x10000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
-
-
-
-
- 0x20000
-
-
-
+
+
+
+
diff --git a/mcdp/resources/targets/mpc555/registerDictionary.xml b/mcdp/resources/targets/mpc555/registerDictionary.xml
index 2e1bbe8..b579422 100644
--- a/mcdp/resources/targets/mpc555/registerDictionary.xml
+++ b/mcdp/resources/targets/mpc555/registerDictionary.xml
@@ -219,13 +219,17 @@
Count Register
-
+
- DAE/ Source Instruction Service Register (DSISR)
+
+ DAE/ Source Instruction Service Register (DSISR)
+
- DAE/ Source Instruction Service Register
+
+ DAE/ Source Instruction Service Register
+
Data Address Register (DAR)
@@ -312,7 +316,9 @@
Processor Version Register
- I-Cache Control and Status Register (ICCST)
+
+ I-Cache Control and Status Register (ICCST)
+
I-Cache Control and Status Register
@@ -330,10 +336,14 @@
I-Cache Data Port
- Floating-Point Exception Cause Register (FPECR)
+
+ Floating-Point Exception Cause Register (FPECR)
+
- Floating-Point Exception Cause Register
+
+ Floating-Point Exception Cause Register
+
@@ -374,16 +384,24 @@
Debug Enable Register
- Breakpoint Counter A Value and Control (COUNTA)
+
+ Breakpoint Counter A Value and Control (COUNTA)
+
- Breakpoint Counter A Value and Control
+
+ Breakpoint Counter A Value and Control
+
- Breakpoint Counter B Value and Control (COUNTB)
+
+ Breakpoint Counter B Value and Control (COUNTB)
+
- Breakpoint Counter B Value and Control
+
+ Breakpoint Counter B Value and Control
+
Comparator E Value Register (CMPE)
@@ -410,19 +428,25 @@
Comparator H Value Register
- L-Bus Support Comparators Control (LCTRL1)
+
+ L-Bus Support Comparators Control (LCTRL1)
+
L-Bus Support Comparators Control
- L-Bus Support Comparators Control (LCTRL2)
+
+ L-Bus Support Comparators Control (LCTRL2)
+
L-Bus Support Comparators Control
- I-Bus Suupport Control Register (ICTRL)
+
+ I-Bus Suupport Control Register (ICTRL)
+
I-Bus Suupport Control Register
@@ -439,7 +463,7 @@
Development Port Data Register
-
+
Time Base Lower - Read (TBL)
@@ -474,7 +498,9 @@
Count Register
- Floating-Point Status and Control Register
+
+ Floating-Point Status and Control Register
+
Memory Control Base Register 0